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 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT804T
Fast CMOS Buffer/Clock Driver
Product Features
Low output skew: 0.8ns Clock busing with Hi-Z state control TTL input and output levels, reducing problematic ground bounce High output drive, IOL = 64mA Extremely low static power (1mW, typ.) Hysteresis on all inputs Packages available: 16-pin 300 mil wide plastic SOIC (S) 16-pin 150 mil wide QSOP (Q)
Product Description
Pericom Semiconductors PI49FCT series of logic circuits are produced using the Companys advanced 0.8 micron CMOS technology, achieving industry leading speed grades. The PI49FCT804T is a non-inverting clock driver designed with two independent groups of buffers. These buffers have Hi-Z state Output Enable inputs (active LOW) with a 1-in, 4-out configuration per group. Each clock driver consists of two banks of drivers, driving four outputs each from a standard TTL compatible CMOS input.
Logic Block Diagram
OEA 4 INA OA3-OA0
Product Pin Configuration
OA0 OA1 OA2 GND
1 2 3 4 5 6 7 8
16 15
VCC OB0 OB1 OB2 GND OB3 OEB INB
16-Pin P, S
14 13 12 11 10 9
4 INB OEB OB3-OB0
OA3 GND OEA INA
Product Pin Description
Pin N ame O EA, O EB IN A, IN B O AN, O BN GN D VCC C lock Inputs C lock O utputs Ground Power D e s cription Hi- Z State O utput Enable Inputs (Active LO W)
Truth Table(1)
Inputs OEA, OEB L L H H INA, INB L H L H Outputs OAN, OBN L H Z Z
Note: 1. H = High Voltage Level L = Low Voltage Level Z = High Impedance
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PI49FCT804T Buffer/Clock Driver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ........................................................ 65C to +150C Ambient Temperature with Power Applied ........................... 0C to +70C Supply Voltage to Ground Potential (Inputs & Vcc Only) .. 0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) 0.5V to +7.0V DC Input Voltage .................................................................0.5V to +7.0V DC Output Current .......................................................................... 120mA Power Dissipation ...............................................................................0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 0C to +70C, VCC = 5.0V 5%)
Parameters Description VOH VOL VIH VIL IIH IIL IOZH IOZL II VIK IOS VH Output HIGH Voltage Output LOW Current Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current High Impedance Output Current Input HIGH Current Clamp Diode Voltage Short Circuit Current Input Hysteresis VCC = Max., VIN =VCC (Max.) VCC = Min., IIN = 18 mA VCC = Max.(3), VOUT = GND VCC = 5V 60 0.7 120 200 Test Conditions(1) VCC = Min., VIN = VIH or VIL VCC = Min., VIN = VIH or VIL Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VIN = VCC VIN = GND VOUT = VCC VOUT = GND IOH = 24.0mA IOL = 64mA 2.0 0.8 1 1 1 1 20 1.2 225 Min. 2.4 Typ.(2) 3.3 0.3 0.55 Max. Units V V V V A A A A A V mA m V
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Units pF pF
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
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PI49FCT804T Buffer/Clock Driver
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per Input @ TTL HIGH Supply Current per Input per MHz(4) VCC = Max. VCC = Max. VCC = Max., Outputs Open OEA = OEB = GND Per Output Toggling 50% Duty Cycle VCC = Max., Outputs Open fI = 10 MHZ 50% Duty Cycle OEA = OEB = GND Four Outputs Toggling VCC = Max., Outputs Open fI = 2.5 MHZ 50% Duty Cycle OEA = OEB = GND Eight Outputs Toggling Test Conditions(1) VIN = GND or VCC VIN = 3.4V(3) VIN = VCC VIN = GND Min. Typ.(2) 3 0.5 0.15 Max. 30 2.0 0.25 Units A mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND
6.2 6.4
11.2(5) 12(5)
mA
3.1
6.3(5)
3.5
7.6(5)
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
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PI49FCT804T Buffer/Clock Driver
PI49FCT804T Switching Characteristics over Operating Range
804T Com. Parame te rs tPLH tPHL tPZH tPZL tPHZ tPLZ tSKEW(O)(3) tSKEW(p)(3) tSKEW(t)(3) D e s cription Propagation Delay INA to O AN, O EB to O BN O utput Enable Time O EA to O AN, O EB to O BN O utput Disable Time O EA to O AN, O EB to O BN Skew between two outputs of same package (same transition) Skew between opposite transitions (tPHL- tPLH)of the same package Skew between two outputs of different packages at same temperature (same transition) CL = 50pF RL = 500 Conditions (1) M in. 1.5 1.5 1.5 M ax. 6.5 8.0 7.0 0.8 1.0 1.6 804AT Com. M in. 1.5 1.5 1.5 M ax. 5.8 8.0 7.0 ns 0.7 0.8 1.4 Units
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew measured at worse cast temperature (max. temp).
Tests Circuits For All Outputs(1)
VCC 7.0V
Switch Position
Test Open Drain Disable LOW Enable LOW All Other Inputs Switch Closed Open
500 VIN Pulse Generator RT D.U.T. 50pF CL 500 VOUT
Definitions: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
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PI49FCT804T Buffer/Clock Driver
Switching Waveforms
Propagation Delay
3V Input tPLH Output tPHL VOH 1.5V VOL
Oy tPLHy tPHLy
Output Skew tSK(o)
3V Input tPLHx Ox tSK(o) tSK(o) VOH 1.5V VOL tPHLx VOH 1.5V VOL 1.5V 0V
1.5V 0V
Enable and Disable Times
Enable OE tPZL Output Normally Low Output Normally High 3.5V Switch Closed tPZH Switch Open 1.5V 0V 0V 1.5V 0.3V tPHZ 0.3V VOH
Output
Disable 3V 1.5V 0V tPLZ 3.5V VOL
Input
tSK(o) = | tPLHy - tPLHx | or | tPHLy - tPHLx |
Pulse Skew tSK(p)
3V 1.5V 0V tPLH tPHL VOH 1.5V VOL tSK(p) = | tPHL - tPLH |
Package Skew tSK(t)
3V Input tPLH1 Package 1 Output tSK(t) Package 2 Output tPLH2 tPHL2 tSK(t) VOH 1.5V VOL tPHL1 VOH 1.5V VOL 1.5V 0V
tSK(t) = | tPLH2 - tPLH1 | or | tPHL2 - tPHL1 |
5
PS7005B
06/26/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT804T Buffer/Clock Driver
16-Pin 300-Mil Wide SOIC (S)
16
.2914 .2992
7.40 7.60 .010 0.254 x 45 .029 0.737
1 .398 10.10 .413 10.50 .020 0.508 .030 0.762 .0926 2.35 .1043 2.64 SEATING PLANE 0-8 0.41 .016 1.27 .050 .394 .419 10.00 10.65 .0091 0.23 .0125 0.32
.050 BSC 1.27
.013 .020 0.33 0.51
.0040 .0118
0.10 0.30 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS
16-Pin 150-Mil Wide QSOP (Q)
16
.008 0.20 MIN.
.150 .157
3.81 3.99
.008 .013 0.20 0.33 Guage Plane
.010 0.254
1 .189 .197 4.80 5.00
Detail A
.016 .035 0.41 0.89
.041 1.04 REF
0-6
.015 x 45 0.38
.008 0.203 REF
.053 1.35 .069 1.75 0.41 .016 1.27 .050 .228 .244 5.79 6.19
Detail A
.007 .010
0.178 0.254
SEATING PLANE .004 0.101 .010 0.254
.025 BSC 0.635
.008 .012 0.203 0.305
X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS
Ordering Information
Part Numbe r PI49FCT804Tp PI49FCT804ATp M arking Code PI49FCT804Tp PI49FCT804TpA
Note: p = Package Types: Q = 150-mil QSOP; S = 300-mil SOIC Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
6
PS7005B 06/26/01


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